This invention relates to semi-insulator circuits and in particular to Gallium Arsenide circuits connected to form a clock circuit for storing data in a register.
Microprocessors typically have a Arithmetic Logic Unit (ALU) that is connected to a register file in which the operands that are to be operated upon by the ALU are stored. When a particular register in the register file is addressed an enabled then the contents of that register is applied to the ALU for adding to the contents to a second register in the register file that is also addressed and enabled. The output of the ALU is then stored in an output register.
The registers to minimize the effects of line transients have traditionally been configured with "D" type flip-flops. The prior art "D" type flip-flop loads on every clock cycle when used in a microprocessor. To save the data stored in the register a feedback loop is required form the Q output to the D input of the flip-flop to reload the "D" type flip-flop on each new clock pulse. This circuit necessitates a reload gate and creates fan out problems for the reload clock circuit especially when for speed the circuits are configured with GaAs Heterojunction Integrated Injection Logic (HI.sup.2 L) gates.